Verification Engineer

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Location
Munich, Germany
Job Type
Direct Hire
Date
Mar 29, 2018
Job ID
2584817
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Verification Engineer

 
Job Description:
  • Develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors.
  • Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market
  • You will work closely with the design team to ensure timely delivery of quality designs
  • Working with methods to accelerate verification time
  • Involvement in Post Silicon Validation
 
Qualifications:
  • 5+ years’ experience in SoC Verification
  • You will need to have advanced knowledge of SoC architecture/design & in-depth knowledge of verification flow
  • Must have a clear understanding and proven experience in advanced verification process, including dynamic, coverage based and formal methods
  • Familiarity with verification environments, VMM, SystemVerilog – an advantage
  • Knowledge of formal, hardware acceleration – an advantage
  • Will need to have scripting and programming experience using several of the following: Perl, e, Verilog, System Verilog, C, C++, and TCL
 
Education:
  • MSEE/BSEE or equivalent preferred
 
Identifier: $NEER